What is event log?
A: The event log is a message to inform end-user that system has error occur.
Why do we need event log?
A: When system POST has error, it should be recorded by system BIOS in order to notify end-user system has error occur.
Where can I find the event log?
A: The event log will be saved in SMBIOS type 15h by system BIOS.
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Thursday, February 24, 2011
Wednesday, February 23, 2011
How to call interrupt vector by SMM thunk?
...
if (InSmm) {
Status = SmmRt->LocateProtocol (
&gModulesSmmThunkProtocolGuid,
NULL,
&smmthunk
);
//
// Before we execute smmthunk, we should clean the regs. In order to aviod strange issue.
//
EfiZeroMem (&Regs, sizeof (Regs));
Status = smmthunk->SctIsr86 (
smmthunk,
0x10, // Interrupt vector
&Regs);
} else {
...
}
...
if (InSmm) {
Status = SmmRt->LocateProtocol (
&gModulesSmmThunkProtocolGuid,
NULL,
&smmthunk
);
//
// Before we execute smmthunk, we should clean the regs. In order to aviod strange issue.
//
EfiZeroMem (&Regs, sizeof (Regs));
Status = smmthunk->SctIsr86 (
smmthunk,
0x10, // Interrupt vector
&Regs);
} else {
...
}
...
Monday, February 21, 2011
AMD Switchable Graphics
1. Implement PEI phase power sequence.
2. If the step one is right, the dGPU PCI device should be regconized under OS.
3. Need add a VBIOS for dGPU.
4. Load VBIOS to memory in DXE phase and create ACPI SSDT table for OS to active SG function.
5. Fill SVID/SSID to dGPU PCI register.
6. Save dGPU PCI register 0x00 ~ 0x3F for restore when system resume from S3.
7. If nothing is wrong, the SG should be worked very well.
2. If the step one is right, the dGPU PCI device should be regconized under OS.
3. Need add a VBIOS for dGPU.
4. Load VBIOS to memory in DXE phase and create ACPI SSDT table for OS to active SG function.
5. Fill SVID/SSID to dGPU PCI register.
6. Save dGPU PCI register 0x00 ~ 0x3F for restore when system resume from S3.
7. If nothing is wrong, the SG should be worked very well.
ACPI Wake Up Event
How to implement ACPI wake up event?
1. Add a wake up device and namespace for _PRW
Scope(\_SB.PCI0) // General-Purpose Event
{
Device(XHC0) // USB 3.0 Devices
{
Name(_ADR,0x100000) // Device 16 Fun0
Name(_PRW,Package(2)
{
0x18, // Wake from USB PME#
0x04 // Lowest sleep state to wake from
})
}
}
2. Add a GPE event for notify device
Scope(\_GPE) // General-Purpose Event
{
Method(_L18,0x0,Notserialized) // USB PME# wake event
{
Notify(\_SB.PCI0.XHC0, 2) // It will notify XHC0 driver
...
}
...
}
3. The SciMap of Xhc0 device need to change to 0x18 for AMD chipset (SB900).
The GPE event number should be the same with _PRW.
L event number need to refer chipset setting.
Q event number need to refer EC setting.
1. Add a wake up device and namespace for _PRW
Scope(\_SB.PCI0) // General-Purpose Event
{
Device(XHC0) // USB 3.0 Devices
{
Name(_ADR,0x100000) // Device 16 Fun0
Name(_PRW,Package(2)
{
0x18, // Wake from USB PME#
0x04 // Lowest sleep state to wake from
})
}
}
2. Add a GPE event for notify device
Scope(\_GPE) // General-Purpose Event
{
Method(_L18,0x0,Notserialized) // USB PME# wake event
{
Notify(\_SB.PCI0.XHC0, 2) // It will notify XHC0 driver
...
}
...
}
3. The SciMap of Xhc0 device need to change to 0x18 for AMD chipset (SB900).
The GPE event number should be the same with _PRW.
L event number need to refer chipset setting.
Q event number need to refer EC setting.
Tuesday, February 15, 2011
CMOS Access
CMOS是透過IO的方式去存取,Intel Chipset和AMD Chipset有兩個Bank(128 Bytes * 2)可以存取,但是設計上有些許差異,在使用上必須注意。
Intel
存取Bank 0 是透過 IO port 0x70 去設定索引值(Index port),Index 值可以為0x00 ~ 0xFF, 但是0x00~0x7F會對映到0x80~0xFF為同一位置。
從IO port 0x71去取得資料(Data port)。
存取Bank 1 是透過 IO port 0x72 去設定索引值(Index port),Index 值可以為0x00 ~ 0xFF, 但是0x00~0x7F會對映到0x80~0xFF為同一位置。
從IO port 0x73去取得資料(Data port)。
AMD
存取Bank 0 是透過 IO port 0x70 去設定索引值(Index port),Index 值可以為0x00 ~ 0xFF, 但是0x00~0x7F會對映到0x80~0xFF為同一位置。
從IO port 0x71去取得資料(Data port)。
存取Bank 1 是透過 IO port 0x72 去設定索引值(Index port),Index 值可以為0x00 ~ 0xFF, 但是0x00~0x7F會對映到Bank 0 0x00~0x7F的位置,而0x80~0xFF則是Bank 1 0x80~0xFF的位置。
從IO port 0x73去取得資料(Data port)。
Intel
存取Bank 0 是透過 IO port 0x70 去設定索引值(Index port),Index 值可以為0x00 ~ 0xFF, 但是0x00~0x7F會對映到0x80~0xFF為同一位置。
從IO port 0x71去取得資料(Data port)。
存取Bank 1 是透過 IO port 0x72 去設定索引值(Index port),Index 值可以為0x00 ~ 0xFF, 但是0x00~0x7F會對映到0x80~0xFF為同一位置。
從IO port 0x73去取得資料(Data port)。
AMD
存取Bank 0 是透過 IO port 0x70 去設定索引值(Index port),Index 值可以為0x00 ~ 0xFF, 但是0x00~0x7F會對映到0x80~0xFF為同一位置。
從IO port 0x71去取得資料(Data port)。
存取Bank 1 是透過 IO port 0x72 去設定索引值(Index port),Index 值可以為0x00 ~ 0xFF, 但是0x00~0x7F會對映到Bank 0 0x00~0x7F的位置,而0x80~0xFF則是Bank 1 0x80~0xFF的位置。
從IO port 0x73去取得資料(Data port)。
Friday, February 4, 2011
LPC Bus
LPC - Low Pin Count
LPC Bus用來取代傳統多腳位的的ISA Bus,最高時脈可達33MHz,像是parallel port device / serial port device / PS2 keyboard / PS2 mouse / floppy disk / EC / BIOS 比較低速的週邊裝置都使用LPC Bus來傳輸資料,避免猶如機車(慢速)騎上高速公路(BUS)去佔汽車(快速)的車道而造成塞車現象,關於LPC的詳細資料可到Intel網站去下載Low Pin Count specification。不過現在SPI Bus也開始漸漸取代LPC Bus的地位。下一篇文章會有SPI的介紹。
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