1. Implement PEI phase power sequence.
2. If the step one is right, the dGPU PCI device should be regconized under OS.
3. Need add a VBIOS for dGPU.
4. Load VBIOS to memory in DXE phase and create ACPI SSDT table for OS to active SG function.
5. Fill SVID/SSID to dGPU PCI register.
6. Save dGPU PCI register 0x00 ~ 0x3F for restore when system resume from S3.
7. If nothing is wrong, the SG should be worked very well.
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