AMD GPIO Setting Guide

Setting multi-function pin register in AMD FCH IoMux register(AcpiMMioAddr + 0xD00 ~ 0xDFF).
According to hardware setting to set what kind of function that BIOS should set to FCH IoMux register.

For example

    

    

     Function 0: CLK_REQ1#

     Function 1: FANOUT4

     Function 2: GPIO61

     That means IoMux<61> register should set to 0x00(CLK_REQ1#)

     If this pin isn't for GPIO use, we don't care the GPIO register setting.

According to hardware design some pins to GPI or GPO,

we should set GPIO<0 ~ 228> register to GPI or GPO, pull-up or pull down and sticky or not.

The GPIO registers also control the GEvent pins. The GEvent<X> pins,

where the X is in the range of 0 ~ 23, map to the offset range 60h ~ 77h (or 96 ~119 in decimal).